Radio frequency identification (RFID) tags are rapidly replacing bar codes as the technology of choice for inventory tracking and appear to be the coming technology for retail checkouts as well. Among other functions, RFID readers receive RF signals from the RFID tags, and convert the received signals to digital signals for further processing for use in such applications as inventory tracking and pricing systems. This function is typically performed by the reader front end, which comprises the circuitry necessary for transmitting and receiving the RF signals and performing the analog to digital conversion prior to digital signal processing.
FIG. 1 depicts a prior art analog inphase/quadrature (I/Q) demodulator-based homodyne receiver circuit. The analog version of this homodyne circuit dates back at least to the 1950s (see, e.g., King, Microwave Homodyne Systems (1978)). As seen in FIG. 1, this architecture includes two receiver mixers 105, 110, operating simultaneously on an inphase local oscillator (LO) signal, from demodulator input port 115 through optional low noise amplifier (LNA) 120 and then O-degree splitter 125, and a quadrature LO signal, from LO input port 130 through quadrature hybrid 135. The inphase (I) and quadrature (Q) outputs of the receiver mixers are then passed through antialiasing filters 140, 145 and baseband amplifiers 150, 155 prior to signal processing.
The digital version of this homodyne receiver circuit, which is utilized in RFID reader front ends in current RFID industry standard practice, is depicted in FIG. 2. Like the circuit of FIG. 1, this architecture includes two receiver mixers 205, 210, operating simultaneously on an inphase LO signal, from demodulator input port 215 through optional LNA 220 and then 0-degree splitter 225, and a quadrature LO signal, from LO input port 230 through quadrature hybrid 235. The inphase (I) and quadrature (Q) outputs of the receiver mixers are then filtered 240, 245 and baseband amplified 250, 255 prior to further processing. This circuit further includes two analog to digital converters (ADCs) 260, 265 that independently and simultaneously convert the I and Q analog baseband outputs of the receiver mixers 205, 210 to a complex-valued digital representation for subsequent processing in the digital domain, e.g. by a Digital Signal Processor (DSP).
A problem with these prior art architectures is that ADCs can be very expensive, frequently representing 10-15% of the analog component cost in an RFID reader. Furthermore, in an integrated RFID reader based on an application specific integrated circuit (ASIC), the need for two ADCs to separately digitize I and Q components translates directly into increased development time and required semiconductor die area, which consequently leads to increased integrated circuit cost. Reducing the number of ADCs required for the reader front end would therefore translate directly into a large cost savings. What has been needed, therefore, is an RFID reader front end that uses only one analog to digital converter, rather than the current standard of two, in order reduce component and/or development costs.